In recent years, semiconductor devices have become increasingly finer-structured, so that higher-precision size management is required. Accordingly, size management using an electron beam length measurement device based on a scanning electron microscope is performed in manufacturing scenes. The measurement precision of the size management is determined by the magnification calibration precision of the scanning electron microscope.
Patent documents 1 and 2 disclose a configuration in which a pattern for calibration has different pitches of fine sizes on the order of 1 μm. However, higher-magnification measurement for finer semiconductor devices narrows the visual field of the scanning electron microscope, which requires the pattern of the standard sample for calibrating the magnification to be equal to or better in fineness than semiconductor patterns.
On the other hand, patent document 3 and non-patent document 1 propose a superlattice sample as a calibration sample having fineness of a pitch size of not greater than 100 nm.